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<style> | <style> | ||
* { | * { | ||
− | + | ||
} | } | ||
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} | } | ||
.content { | .content { | ||
− | background: | + | background: url("https://static.igem.org/mediawiki/2018/b/b1/T--SCU-China--backwhite.jpg"); |
padding: 1.2em 5em; | padding: 1.2em 5em; | ||
} | } | ||
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.sidebar ul li a { | .sidebar ul li a { | ||
− | color: # | + | color: #000000; |
} | } | ||
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} | } | ||
.footer { | .footer { | ||
− | background-color:# | + | background-color:#4455; |
width:100%; | width:100%; | ||
text-align:center; | text-align:center; | ||
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<ul> | <ul> | ||
<li><a href="https://2018.igem.org/Team:SCU-China/project/overview">Overview</a></li> | <li><a href="https://2018.igem.org/Team:SCU-China/project/overview">Overview</a></li> | ||
− | |||
<li><a href="https://2018.igem.org/Team:SCU-China/project/regulation">Precise Regulation</a></li> | <li><a href="https://2018.igem.org/Team:SCU-China/project/regulation">Precise Regulation</a></li> | ||
<li><a href="https://2018.igem.org/Team:SCU-China/project/circuits">Logic Circuits</a></li> | <li><a href="https://2018.igem.org/Team:SCU-China/project/circuits">Logic Circuits</a></li> | ||
<li><a href="https://2018.igem.org/Team:SCU-China/project/indigo">CRISProgrammer of Indigo</a></li> | <li><a href="https://2018.igem.org/Team:SCU-China/project/indigo">CRISProgrammer of Indigo</a></li> | ||
<li><a href="https://2018.igem.org/Team:SCU-China/project/parts">Parts</a></li> | <li><a href="https://2018.igem.org/Team:SCU-China/project/parts">Parts</a></li> | ||
+ | <li><a href="https://2018.igem.org/Team:SCU-China/project/interlab">Interlab</a></li> | ||
</ul> | </ul> | ||
</li> | </li> | ||
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</div> | </div> | ||
<div class="head"> | <div class="head"> | ||
− | + | <img src="https://static.igem.org/mediawiki/2018/5/52/T--SCU-China--headback.jpg" style="width:100%;"> | |
<div class="headline sides"> | <div class="headline sides"> | ||
− | + | ||
</div> | </div> | ||
</div> | </div> |
Latest revision as of 01:02, 18 October 2018