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− | <h4>To test the efficiency of our system, we performed quantitative <a href="https://2018.igem.org/Team:CPU_CHINA/Experiments?qPCR=1">PCR (qPCR) on the effector miRNA and the targeted MAP4K4 <u>mRNA</u>(Figure 6A). Pri-miRNA analogue was successfully encoded and processed into miRNA, however, with the presence of the inhibitory strand, the amount of miRNA sharply decreased since DROSHA cannot cleave the pri-miRNA. This can be further confirmed in Figure 6B where a significant increase of mRNA was observed after expression of the inhibitory strand, which also indicates that our miRNA can successfully target MAP4K4. | + | <h4>To test the efficiency of our system, we performed quantitative <a href="https://2018.igem.org/Team:CPU_CHINA/Experiments?qPCR=1">PCR (qPCR) on the effector miRNA and the targeted MAP4K4 <u>mRNA</u></a>(Figure 6A). Pri-miRNA analogue was successfully encoded and processed into miRNA, however, with the presence of the inhibitory strand, the amount of miRNA sharply decreased since DROSHA cannot cleave the pri-miRNA. This can be further confirmed in Figure 6B where a significant increase of mRNA was observed after expression of the inhibitory strand, which also indicates that our miRNA can successfully target MAP4K4. |
<h4>However, from Figure 6A and 7B we found that NS5B did not function as expected, the inhibitory strand hardly removed. Taken from the results discussed above this might be due to insufficient presence of NS5B in the nucleus. However, the efficiency of nucleus translocation can be improved with e.g. adding two NLSs, thus our system might still work. Efforts will be paid regarding this issue in the future. | <h4>However, from Figure 6A and 7B we found that NS5B did not function as expected, the inhibitory strand hardly removed. Taken from the results discussed above this might be due to insufficient presence of NS5B in the nucleus. However, the efficiency of nucleus translocation can be improved with e.g. adding two NLSs, thus our system might still work. Efforts will be paid regarding this issue in the future. | ||
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Revision as of 13:41, 5 December 2018
"The AND gate is a basic digital logic gate that implements logical conjunction. A HIGH output (1) results only if all the inputs to the AND gate are HIGH (1)."
--Wikipedia
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